Responsibilities Microarchitecture and design in Verilog/System Verilog. Define and own ASIC design methodologies. Integrate complex IPs developed by internal groups as well as other vendors. Block and chip level RTL verification and gate-level netlist testing. Support
ASTRI - Hong Kong Applied Science and Technology Research Institute is seeking an experienced engineer to develop algorithms, verification software, and system software for EDA tools. Candidates should hold at least a Bachelors degree in computer
Job Responsibilities Develop algorithms for EDA tools to optimize the PPA, including conventional and AI algorithm development, optimization, and evaluation Develop EDA verification software for commercialization Develop system software for EDA tools Perform ad-hoc duties as
Leadingnation in Hong Kong is seeking a skilled ASIC Engineer to join their team. You will work on microarchitecture and design using Verilog/SystemVerilog, define design methodologies, and integrate complex IPs. A Bachelors or Masters in Electrical/Computer
Duties Microarchitecture and design in Verilog/SystemVerilog. Define and own ASIC design methodologies. Integrate complex IPs developed by internal groups as well as other vendors. Block and Chip level RTL verification and gate-level netlist testing. Support other